Digital Audio Broadcasting Receiver Research Articles

Digital Audio Broadcasting (DAB)-based demand response for buildings, electric vehicles and prosumers (DAB-DSM)

The main objective of this paper is to present a new and cost-effective Information and Communication Technology (ICT) tool that can lead to efficient energy management in buildings and optimal operation of electricity networks with increased share of Renewable Energy Sources (RES) and Electric Vehicles (EVs). The new ICT infrastructure is based on the Digital Audio Broadcasting (DAB) standard and its interoperability with smart metering technology, Intelligent Transportation Systems (ITS) and Building Automation Systems (BAS). The main idea involves the attachment of a DAB receiver to electric devices (from small household appliances up to EVs and solar systems and other RES). In this paper, the DAB protocol is described, enabling high cyber-physical security. Moreover, the results of addressing a thermostatically-controlled load using DAB-signaling in Switzerland are also presented. The next steps envisioned are i) the validation of the final protocol version and of the DAB receivers for various electric appliances and DR schemes and, ii) demonstration of the new technology in real-life cases through the National DAB broadcaster in Greece.

Design of a high linearity and high gain accuracy analog baseband circuit for DAB receiver

An analog baseband circuit of high linearity and high gain accuracy for a digital audio broadcasting receiver is implemented in a 0.18-μm RFCMOS process. The circuit comprises a 3rd-order active-RC complex filter (CF) and a programmable gain amplifier (PGA). An automatic tuning circuit is also designed to tune the CF's pass band. Instead of the class-A fully differential operational amplifier (FDOPA) adopted in the conventional CF and PGA design, a class-AB FDOPA is specially employed in this circuit to achieve a higher linearity and gain accuracy for its large current swing capability with lower static current consumption. In the PGA circuit, a novel DC offset cancellation technique based on the MOS resistor is introduced to reduce the settling time significantly. A reformative switching network is proposed, which can eliminate the switch resistor's influence on the gain accuracy of the PGA.The measurement result shows the gain range of the circuit is 10–50 dB with a 1-dB step size, and the gain accuracy is less than ±0.3 dB. The OIP3 is 23.3 dBm at the gain of 10 dB. Simulation results show that the settling time is reduced from 100 to 1 ms. The image band rejection is about 40 dB. It only draws 4.5 mA current from a 1.8 V supply voltage.

An Improved Digital Automatic Gain Control Method for DAB Receivers

Abstract Digital Audio Broadcasting (DAB) is designed for reliable reception up to vehicle speed of 120 km/h. The high vehicle speed reception requires fast Automatic Gain Control (AGC) to compensate the Rayleigh fading effects in wireless environment. But fast AGC will also incorrectly amplify DAB's null symbol and the following phase reference symbol to cause synchronization problem. Traditional DAB receivers use an 'agc_hold' signal to hold the AGC voltage to avoid the incorrect amplification during the null symbol. But this method requires one extra pin on both the RF tuner and the baseband decoder chips of the DAB receiver. Also it requires good time alignment between the 'agc_hold' signal and the actual null symbol, which brings the complexity to the receiver design. In this paper we proposed an improved AGC method which does not require the 'agc_hold' signal, while still keeps the null symbol quite clear. The new AGC method can be digitally implemented and integrated into the baseband decoder. Comparing to the traditional AGC method, the proposed method reduces the pin numbers of both the RF tuner and the baseband decoder chips. Also it reduces the communications between the RF tuner and the baseband decoder, thus simplifies the receiver design.

Performance analysis of OFDM and DAB receivers in the presence of spurious tones

A number of mechanisms can result in the generation of spurious tones in Orthogonal Frequency Division Multiplexing (OFDM) receivers. In this work we determine the Signal-to-Noise-Ratio (SNR) degradation at the output of the Fast-Fourier-Transform (FFT) block and evaluate the performance of a Digital Audio Broadcasting (DAB) receiver in the presence of such tonal interference. We show that the degradation varies with the central frequency of the interference and demonstrate that relatively weak spurious tones can compromise the performance of a DAB receiver. We provide specific evaluations of the severity of the above effect for all possible DAB systems parameterizations and evaluate the permissible levels of spurious tones in such systems. It is shown that for DAB EEP Mode A protection level 4, tonal interference of 14 dB lower than the signal can compromise the receiver performance.

An Efficient FFT Processor for DAB Receiver Using Circuit-Sharing Pipeline Design

With the upcoming fourth generation wireless systems and convergence of multiple radio standards into a single terminal, building blocks are needed that can be configured for computing various algorithms used in different standards. Given these trends and requirements, in our previous paper we successfully proposed a circuit-sharing design for the DAB receiver to integrate the FFT (fast Fourier transform) and IMDCT (inverse modified discrete cosine transform) operations into the same functional circuit. The proposed technique reduces hardware overhead, enhances circuit efficiency and significantly reduces the cost of DAB receivers. To further improve the efficiency of our previous work, this investigation proposes another alternative design named the circuit-sharing pipeline design (CSPD) using a single processor with a pipeline scheme to combine two functions, FFT and IMDCT, into the same circuit. The proposed method reduces the required chip area and cost of DAB receivers. Analyzing the existing relationship among IMDCT, DCT (discrete cosine transform) and FFT, the IMDCT function can be replaced using a FFT function. Therefore, it is not necessary to design an extra circuit for IMDCT. The arithmetic unit in the FFT processor can be significantly reduced due to employing the pipeline scheme. Consequently, the circuit redundancies in the IMDCT and FFT functions can be easily eliminated to allow exploitation of the decreased chip area. Results of this study demonstrate that the proposed design can provide advantages such as low gate count and small memory size in the DAB (digital audio broadcasting) receiver.

A Notebook PC Based Real-Time Software Radio DAB Receiver

To improve Digital Audio Broadcasting (DAB) receiver performance, we need to use better signal processing algorithm. However, it is impossible to modify the signal processing algorithm in DAB commercial hardware. In addition, the notebook PC based software radio research platform allows convenient acquisition of the massive radio data at variant environments and online analysis with variable signal processing procedure more easily. We have developed the first prototype portable software radio research platform for DAB which consists of a USB RF receiver module, USB interface and PC based software for device controlling and signal processing. Iterative decoding and ICI cancellation are also added to improve the performance in mobile channels.

ROM REDUCTION FOR OFDM SYSTEM USING TIME-STEALING STRATEGY

Modern communication systems frequently exploit the OFDM (Orthogonal Frequency Division Multiplex) technique to obtain a highly robust transmission of multimedia information, such as digital audio/video broadcast. OFDM and most of the other multimedia compression techniques usually require expensive computations, e.g., FFT (Fast Fourier Transform) and IMDCT (Inverse Modified Discrete Cosine Transform) processing. Traditionally, designing FFT and IMDCT separately involves a significant amount of redundancy in hardware. To reduce the required hardware, this investigation proposes a new ROM-sharing design for storing both FFT twiddle factors and IMDCT coefficients in a DAB (Digital Audio Broadcasting) receiver. We first analyze the correlation between FFT operations and IMDCT operations, and then the combinational logic circuit in the FFT processor is modified such that both IMDCT coefficients and FFT twiddle factors can be obtained simultaneously from a shared ROM. This design can also be applied for computing IFFT (Inverse Fast Fourier Transform) and MDCT for DAB transmitter. Compared with the traditional design using separate module scheme, our design does not need extra ROM for IMDCT/MDCT modules. Therefore, the new scheme offers superior solution for combining high-performance FFT (IFFT) operation and IMDCT (MDCT) operation.

FFT and IMDCT circuit sharing in dab receiver

This paper proposes a circuit-sharing approach to improve efficiency for the key digital audio broadcasting (DAB) techniques, i.e., MPEG1-audio decoding and orthogonal frequency division multiplexing (OFDM). Because OFDM's fast Fourier transform (FFT) requires heavy computational power for implementation, a single butterfly processing element (BPE) is adopted to reduce the chip area required for FFT. Furthermore, by modifying the BPE logical combinational circuit, both IMDCT (inverse modified discrete cosine transform) and FFT functions can be obtained simultaneously from a single VLSI chip. Therefore, the proposed technique reduces hardware overhead, enhances circuit efficiency and significantly reduces the cost of DAB receivers. The proposed circuit is simulated as a VLSI prototype chip using a 0.35 /spl mu/m CMOS process, with a chip area of about 22.09 mm/sup 2/ and a total gate count of approximately 10839 (excluding ROM and RAM).

PC-based receiver for Eureka-147 digital audio broadcasting

We present the design and implementation for a Eureka-147 digital audio broadcasting (DAB) receiver. We establish the specifications for the receiver and design the blocks required for DAB reception. Due to the fact that orthogonal frequency division multiplexing (OFDM) is the transmission technique used in the DAB system, the synchronization block plays a key role in the overall system performance among the receiving blocks in the DAB receiver, and for this reason we describe it in detail here. We also include descriptions of several implementation techniques that enable the receiver to run in real-time on a PC. Our findings show that the receiver implemented as described here satisfactorily meets our predetermined specifications.

Requirements for DAB cable-type receiver

After analysis of useful frequencies for DAB (digital audio broadcasting) transmission and the signal levels in CATV (cable television)-networks given, we discuss the theoretical requirements for a cable-type DAB receiver. We show the nature of the digital part and its influence on the characteristics of the receiver's RF-stages. The influence of filters, of nonlinear effects and noise on the receiver's overall performance are discussed. Finally, we present a level diagram for the receiver's stages and discuss data as measured.

A digital audio broadcasting (DAB) receiver

This paper describes the features and functions of the newly developed Eureka-147 DAB (digital audio broadcasting) receiver. In this paper, we also describe an AFC (automatic frequency control) and a synchronization technique using a DSP (digital signal processor).